When the tool can detect a gated clock, and the conversion feature is turned on, it will attempt to separate the clock from the rest of the logic in the gate. If it can do so, the clock will directly drive the C pin of the register, and the rest will get assigned to the clock e...
在Vivado中,打开综合后的设计,可通过report_clock_networks显示所有时钟,包括门控时钟。如下图所示,分别显示了-gated_clock_conversion为on和off时Vivado检测到的时钟,可验证-gated_clock_conversion所起的作用。 结论 -门控时钟会给设计带来一些负面影响,可通过-gated_clock_conversion移除 -当时钟负载少且时钟频率低...
GATED_CLOCK Use the GATED_CLOCK property to enable Vivado synthesis to perform conversion of gated clocks. Convert clock gating logic to utilize the flop enable pins when available. This optimization can eliminate logic on the clock tree and simplify the