The gate of the third set transistor and the gate of the second reset transistor are connected to the output terminal of the first inverter.doi:US7852119 B1Shoji KojimaUSUS7852119 * Dec 10, 2009 Dec 14, 2010 Advantest Corporation SR-flip flop with level shift function...
function of the electric charge of the capacitance, the clock signal source being operatively coupled to the set input terminal as a function of the conduction state of the field effect transistor, whereby the flip- flop is set responsive to the leading edge of the clock signal and is reset ...
During the precharge phase, the static output stage maintains the flip- flop output signal logic at the logic level of the previous evaluation phase independently of the signal received from the dynamic input stage. During the evaluation phase, the static output stage outputs the complement of ...
athe set-up time for CLB-flip flop from CLB-inputs via function generator (TICK), see [3], and the routing delay (TR) between two neighbouring CLBs. 设定时间为通过信号发生器(壁虱) CLB翻转拍击声从CLB输入,看见(3)和发送延迟(TR)二邻居CLBs之间。[translate]...
The present invention involves a configurable flip flop having a first data input node, a second data input node, and an output node. The configurable flip-flop includes an inverter coupled to the first data input node. Each of a plurality of configuration lines address a multiplexor and the ...
data signal to the first latch circuit in a first mode and for cutting off the feedback of the output data signal to the first latch circuit in a second mode, where the logic circuit operates as a toggle flip-flop in the first mode and operates as a delay flip-flop in the second ...
An EFL J-K flip-flop circuit is provided in which feedback of only the true output Q of the slave latch to the input of the master section is required. The circuit in one embodiment includes a slave D- type latch comprising an EFL latch circuit combined with a one level current steerin...
FLIP-FLOP CIRCUIT WITH RESET FUNCTION 专利名称：FLIP-FLOP CIRCUIT WITH RESET FUNCTION 发明人：MAEMURA KIMIMASA 申请号：JP3296690 申请日：19900213 公开号：JPH03236620A 公开日：19911022 专利内容由知识产权出版社提供 摘要：PURPOSE:To interrupt circuit power at reset state by providing a circuit ...
The output of the second inverter is directly connected to the input of the first inverter. The first inverter output is co... RICHARD J. HERBER 被引量: 0发表: 1978年 SEMICONDUCTOR INTEGRATED CIRCUIT PURPOSE: To realize the high speed operation of a flip-flop circuit with a diagnostic ...
The present invention involves a configurable flip flop having a first data input node, a second data input node, and an output node. The configurable flip-flop includes an inverter coupled to the first data input node. Each of a plurali... RH Orgill,CL Cruse,KM Hall - US 被引量: 72...