Self-timed full adder designs based on commercial synchronous resources (standard cells), constructed using a mix of complete delay-insensitive codes adopted for inputs are described in this paper. While one of the adder designs incorporates redundancy into the logic, the other design does not. Co...
full adder/subtractorbinary to BCD converterBCD adderNANO-metric circuitsReversible logic is one of the indispensable aspects of emerging technologies for reducing physical entropy gain, since reversible circuits do not lose information in the form of internal heat during computation. This paper aimed ...
or any form of written materials - Intensive reading Writing - Types of reports – Feasibility / Project report – report format – recommendations / 23 suggestions – interpretation of data (using charts for effective presentation); Grammar - Use of clauses; Vocabulary – Collocation; E-materials...
CONSTITUTION:The sum SUM 1 and the sum SUM 2 of the first digit and the second digit, and the carry output C2out in the second digit are outputted from inputs A1, B1, A2 and B2 in the first digit and the second digit of a full adder adding input data for two digits in the ...
Minimization and Optimization of Reversible BCD-Full Adder/Subtractor Using Genetic Algorithm and Don't Care Concept, International J. Quantum Information, 7(5): 969-989, DOI: 10.1142/S0219749909005523.Mohammadi, M., Haghparast, M., Eshghi, M., and Navi, K. 2009. Minimization optimiza- tion...
Minimization and Optimization of Reversible BCD-Full Adder/Subtractor Using Genetic Algorithm and Don't Care Concept. Int. J. Quantum Inf., 7(5): 969-989.Mohammadi M, Haghparast M, Eshghi M, Navi K. Minimization and optimization of reversible BCD-full adder/subtractor using genetic algorithm ...
Navi, 2009, Minimization and optimization of Reversible BCD-Full Adder/Subtractor Using Genetic Algorithm and Don't Care Concept. International Journal of Quantum Information Processing,Mohamadi M, Haghparast M, Navi K. Minimization and optimization of reversible BCD--full adder/subtractor using ...
A divider, comprising: a carry save adder (2014); and a full adder (2103) connected in series with said carry save adder (2014), wherein the series connection of said carry save adder and said full adder performs an addition computation necessary for division computation....
International Journal of Quantum Information Processing,Mohammadi, M., Haghparast, M., Eshghi, M., Navi, K.: Minimization and optimization of reversible BCD-full adder/subtractor using genetic algorithm and Don't Care concept. Int. J. Quantum Inf. 7(05), 969-989 (2009)...