FSL International, Inc., and Hiu-Leung Yeung, and Full Service Logistics, Inc., and Mei Fung Tsang--Possible Violations of Sections 10(a)(1), 10(b)(2), 10(b)(11) and Sections 19(a) and (b) of the Shipping Act of 1984 and 46 CFR Part 515; Order of Investig...
It seems even set hwconfig fsl_ddr:ecc=on in U-boot, the EDAC still not work. Welcome to NXP LSDK 2004 main (GNU/Linux 4.19.90 aarch64) * Support: https://www.nxp.com/lsdk * Documentation: https://lsdk.github.io/document * Licensing: https://lsdk.github.io/eular...
Hello, We are encountering the following kernel panic caused by the following errors during boot up: [ 129.454177] EDAC FSL_DDR MC0: Err Detect
We are encountering the following kernel panic caused by the following errors during boot up: [ 129.454177] EDAC FSL_DDR MC0: Err Detect Register: 0x80000018 [ 129.454239] SError Interrupt on CPU2, code 0xbf000002 -- SError It seems that when we enable ARM64_ERRATUM_843419,...