* */ #ifndef __FSL_DEVICE_REGISTERS_H__ #define __FSL_DEVICE_REGISTERS_H__ /* * Include the cpu specific register header files. * * The CPU macro should be declared in the project or makefile. */ #if (defined(CPU_MIMXRT1052CVL5B) || defined(CPU_MIMXRT1052DVL6B)) #define MI...
* registers with the supplied addr_base argument. When bases match this * function returns bank number (starting with 0), otherwise it returns * appropriate errno value. */ intfsl_ifc_find(phys_addr_taddr_base) { inti=0; if(!fsl_ifc_ctrl_dev||!fsl_ifc_ctrl_dev->regs) ...
#include "spi-fsl-lib.h"/* eSPI Controller registers */ struct fsl_espi_reg { __be32 mode; /* 0x000 - eSPI mode register */ __be32 event; /* 0x004 - eSPI event register */ __be32 mask; /* 0x008 - eSPI mask register */...
> device nodes for the current kernel being skipped. > [ 4.019498] systemd[1]: Starting Start psplash boot splash screen... > Starting Start psplash boot splash screen... > [ 4.043179] systemd[1]: Starting RPC Bind... > Starting RPC Bind... > [ 4.059638] systemd[1]: Condition check...
* @speed_hz: Default SCK frequency * @reg_base: Base address of QSPI registers * @amba_base: Base address of QSPI memory mapping * @amba_total_size: size of QSPI memory mapping * @flash_num: Number of active slave devices * @num_chipselect: Number ...
hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. hw-breakpoint: maximum watchpoint size is 8 bytes. imx6ul-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver mxs-dma 1804000.dma-apbh: initialized SCSI subsystem initialized ...
hw-breakpoint: found 6 breakpoint and 1 watchpoint registers. hw-breakpoint: 1 breakpoint(s) reserved for watchpoint single-step. hw-breakpoint: maximum watchpoint size is 4 bytes. L310 cache controller enabled l2x0: 16 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x02030000, Cache size: 26214...
/* PCI/PCI Express IO block registers for 85xx/86xx */ struct ccsr_pci { __be32 config_addr; /* 0x.000 - PCI/PCIE Configuration Address Register */ __be32 config_data; /* 0x.004 - PCI/PCIE Configuration Data Register */ __be32 int_ack; /* 0x.008 - PCI Interrupt Acknowledge...
Framework for building Arm Cortex-M "FLM" style flash programming algorithms. - FlashAlgo/source/freescale/fsl_common.h at d9ae7d5b1556cd150f66e71072b8689e93c6c9ac · pyocd/FlashAlgo
Rebased ref, commits from common ancestor: ebf262c6e34f0c82000f62065145cd80d860a8eb Unionfs: Release 2.5.3 5937285121dbfc6dfe8a0c9bd327827fe3a92be7 Unionfs: Release 2.5.3 7664096919a91e3c529871a37aaac50565821b3c Unionfs: handle an open-unlink-ftruncate sequence 9342e08cfd4d81fa86e2a73a3e4c...