Seligman, E., Schubert, T., Achutha Kiran Kumar, M.: Formal Verification: An Essential Toolkit for Modern VLSI Design. Morgan Kaufmann (2015)E. Seligman, T. Schubert, and M. A. K. Kumar, Formal verification: an essen- tial toolkit for modern VLSI design. Morgan Kaufmann, 2015.
Book description Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation, with hands-on advice to help working engineers integrate t ... read full description Purchase book Share this bookBrowse...
Hands on experience with VLSI and digital logic design and verification techniques or formal methods and their application to hardware, software, or systems Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular designs. ...
《Formal Verification An Essential Toolkit for Modern VLSI Design》[1]读书笔记。 Basic formal verification algorithms 利用truth table稀疏性创建truth table; 时序逻辑变量需要新定义变量存储; 根据真值表创建逻辑表达式往往比较复杂冗长,可以通过逻辑代数公式化简。 BDDs 定义 if we apply a set of standardized ...
Hands on experience with VLSI and digital logic design and verification techniques or formal methods and their application to hardware, software, or systems Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular designs
1.Overview for non-classical slicing technique and its application in formal verification;非经典切片技术及其在形式验证中的应用综述 2.Research on Methods for Formal Verification of Vlsi Circuit;超大规模集成电路形式验证的方法研究 3.Study on the Formal Verification Methods in BDD and SAT;基于BDD和SAT的...
Formal verification, Proof assistant, Theorem Prover, Software verification, Hardware verification ... 形式化方法是一种特别的基于数学的技术,用于软件和硬件系统的形式规范、开发以及验证。 形式验证的含义是根据某个或某些形式规范或属性,使用数学的方法证明其正确性或非正确性。
Gehani, Narain, “Specifications: formal and informal—a case study,” In N. Gehani and A. D. McGettrick, editors,Software Specification Techniques, Addison-Wesley, 1986. Gordon, Michael, “HOL: a proof generating system for higher-order logic,” InVLSI Specification, Verification, and Synthesi...
Experience in Formal Property Verification Experience in Formal Coverage Analysis Experience in the use of Formal tools such as JasperGold of FPV Experience of CPU architecture (multi-core coherence, FPU, DSP, interrupt, Vector, Security, Reset and CDC, Debug) ...
Dill DL, Drexler AJ, Hu AJ, Yang CH (1992) Protocol verification as a hardware design aid. In: IEEE international conference on computer design: VLSI in computers and processors. IEEE Computer Society, Los Alamitos, pp 522–525 Google Scholar Goguen J, Einkler T (1988) Introduction to ...