Proposed Collection; Comment Request for Form 5305A-SEPAllan Hopkins
177-180, Sep. 12-16, 2005. Chung, S.-W., et al., “Highly Scalable Saddle-Fin (S-Fin) Transistor for Sub-50nm DRAM Technology,” 2006 Symposium on VLSI Technology Digest of Technical Papers, pp. 32-33. Lee, M. J., et al., “A Proposal on an Optimized Device Structure ...