T Otsuji,M Yoneyama - 《IEEE J Solid State Circuits》 被引量: 110发表: 1997年 Low-Power Double Edge-Triggered Flip-Flop Circuit Design In this paper, we compare three previously published static double edge-triggered (DET) flip-flops with a proposed design for their transistor counts and p...
An apparatus (100) is disclosed that includes a clock distribution circuit (110) configured to shift a first clock signal (ClkA) in the first voltage domain (Vdd) to a second voltage domain (>Vdd) to produce the second clock signal (ClkB). The second voltage domain extends outside of ...
英文 例句与“flip flop circuit" 变形干 匹配词 所有精确任何 Multistage circuit principles: cascades, push-pull, oscillators, multivibrators,flip-flop circuits. EurLex-2 Staticflip-flop circuit patents-wipo Nonvolatile latchcircuit, nonvolatileflip-flop circuitand nonvolatile signal processing device ...
T Otsuji,M Yoneyama - 《IEEE J Solid State Circuits》 被引量: 110发表: 1997年 Low-Power Double Edge-Triggered Flip-Flop Circuit Design In this paper, we compare three previously published static double edge-triggered (DET) flip-flops with a proposed design for their transistor counts and p...
T Otsuji,M Yoneyama - 《IEEE J Solid State Circuits》 被引量: 110发表: 1997年 Low-Power Double Edge-Triggered Flip-Flop Circuit Design In this paper, we compare three previously published static double edge-triggered (DET) flip-flops with a proposed design for their transistor counts and p...
CONSTITUTION:The flip-flop consists of transmission gates 1-6 composed of PMOS and NMOS transistors (TR) and inverter circuits 7-10. The gate of the PMOS TR of the gate 3, the gates of the PMOS TRs of the gates 4 and 5, and the gate of the PMOS TR of the gate 6 are connected ...
flop circuit as well as that of a digital system and to accelerate the machine cycle by accelerating the state transition speed of an SR type flip-flop circuit FF1 composed by practically crossing and coupling a pair of NTL circuits NTL1 and NTL2 while reducing the number of circuit elements...
T Otsuji,M Yoneyama - 《IEEE J Solid State Circuits》 被引量: 110发表: 1997年 Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit A gate array device forms an arbitrary logic circuit depending on interconnections formed thereon, and compris...
A flip-flop circuit which has a low power requirement and is capable of high-speed operation has first and second latch circuits having respective clock input terminals connected respectively to inverted- and normal-phase clock input terminals, a pair of differential data input terminals connected re...