必应词典为您提供flip-flop-circuit的释义,un. 触发电路;触发器电路; 网络释义: 双稳态多谐振荡电路;勫动转镜;正反电路;
There is provided a flip-flop circuit comprising: evaluation means the evaluation component is connected to the first node and the second node to the first node according to the voltage level of the second node discharge; condition delay element, the delay means connected condition to the second...
A master-slave type flip-flop circuit includes a master latch circuit and a slave latch circuit. The master latch circuit includes transfer gates (54, 55) for switching between on and off states in response to a clock signal (CK), transfer gates (56, 57) individually connected in series ...
A secondflip-flop circuit(9) latches the third data signal in accordance with the first clock signal. patents-wipo Disclosed is aflip-flop circuit(200) having improved operating speed. patents-wipo Small-sized rapidly-flip-flop schmittflip-flop circuitused for silicon-on-insulator process ...
A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fi...
A flip-flop circuit is disclosed which has a first semiconductor region of a first conductivity type, injector and base regions of a second conductivity type in the first region, and collector region of the first conductivity type in the base region. In this case, the first, base and collect...
PURPOSE:To prevent a falling-dominoes phenomenon, as an edge trigger type which is capable of circuit operation by only a one-phase clock, by using a first transmission gate circuit and a second transmission gate circuit. CONSTITUTION:The titled circuit is provided with the first transmission gate...
In a double edge triggered flip-flop circuit, a first latch circuit latches input data at either one of rising edge and falling edge of clock signal. A second latch circuit, which is provided in parallel with the first latch circuit, lat... ...
摘要: PURPOSE: To provide possibility of testing a combination circuit which together with a flip-flop circuit constitutes a circuit concerned and which is connected with the clock input end, set input end, or reset input end of the flip-flop circuit....