(FLASH_G0_REGS_ADDR + 0x38) #define FLASH_G0_SECR (FLASH_G0_REGS_ADDR + 0x80) // == STM32G4 == (RM0440 Table 17, sec. 3.7.19) #define FLASH_G4_OPTR_DBANK (22) /* FLASH option register FLASH_OPTR Dual-Bank Mode */ // There are a few extra registers because 'cat ...