fetchdirectedinstructionprefetching取指令预取 系统标签: prefetchingfetchinstructiondirectedcacheprefetch InProceedingsofthe32ndAnnualInternationalSymposiumonMicroarchitecture(MICRO-32),November1999. FetchDirectedInstructionPrefetching GlennReinmanBradCalderToddAustin DepartmentofComputerScienceandEngineering,UniversityofCalifornia...
Lockup-free instruction fetch/prefetch cache organization No abstract available. D Kroft - Morgan Kaufmann Publishers Inc. 被引量: 628发表: 2000年 Fetch directed instruction prefetching marking fetch blocks in the branch predictor that are kicked out of the instruction cache, so branch predicted ...
This allows the branch predictor to run far in advance of the address currently being fetched by the instruction cache. The decoupling enables a number of architectural optimizations including multi-level branch predictor design and fetch directed instruction prefetching.; A multi-level branch predictor...
3) instruction prefetching 指令预取 1. This paper proposes a non sequential instruction prefetching mechanism,which is directed by branch instructions and prefetches a whole basic block each time. 指令预取技术能够有效地降低指令Cache的访问失效率,提高微处理器的取指令能力,进而提高微处理器的性能。
Variable length VLIW instruction with instruction fetch control bits for prefetching, stalling, or realigning in order to handle padding bits and instructions that cross memory line boundariesA computer system with a processing unit and a memory. The processing unit is arranged to fetch memory lines ...
5) instruction prefetching 指令预取 1. This paper proposes a non sequentialinstruction prefetchingmechanism,which is directed by branch instructions and prefetches a whole basic block each time. 指令预取技术能够有效地降低指令Cache的访问失效率,提高微处理器的取指令能力,进而提高微处理器的性能。
5) instruction prefetching 指令预取 1. This paper proposes a non sequential instruction prefetching mechanism,which is directed by branch instructions and prefetches a whole basic block each time. 指令预取技术能够有效地降低指令Cache的访问失效率,提高微处理器的取指令能力,进而提高微处理器的性能。