* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits. * Provides guidance on the implementation of circuit protection measures. * Includes new sections on ESD design rules, layout approaches, package ...
ESD in Silicon Integrated Circuits, Second Edition IntroductionResistorsDiodesTransistor OperationTransistor Operation under ESD ConditionsElectrothermal EffectsSCR OperationConclusion Bibliography A Amerasekera,C Duvvury - ESD in Silicon Integrated Circuits, Second Edition 被引量: 0发表: 2002年 ESD in Silicon...
Charvaka Duvvury is the author of ESD in Silicon Integrated Circuits, 2nd Edition, published by Wiley. Permissions Request permission to reuse content from this site Table of Contents Preface 1. Introduction Background The ESD Problem Protecting against ESD Outline of the Book 2. ESD Phenomenon...
【预订】Esd In Silicon Integrated Circuits 2E 美国库房发货,通常付款后3-5周到货! 作者:E. AjithAmerasekera,Charvaka Duvvury出版社:Wiley; 2出版时间:1988年08月 手机专享价 ¥ 当当价 降价通知 ¥1667 配送至 北京 至 北京市东城区 服务 由“中国进口图书旗舰店”发货,并提供售后服务。
AMERASEKERA Ajith,DUVURY Charvaka.ESD in silicon integrated circuits[J].Electronics & Communication Engineering Journa,1997,9 (5):208-209.ESD in Silicon Integrated Circuits. Duvvury C,Anderson W,Gieser H,et al. College Student Journal . 1997ESD in sili-con integrated circuits. AMERASEKERA ...
ESD (Electrostatic Discharge) Protection in CMOS Integrated Circuits 静电放电(Electrostatic Discharge, ESD) 是造成大多数的电子元件或电子系统受到过度电性应 力(Electrical Overstress EOS) 破坏的主要因素.这种破坏会导致半导体元件以及电脑系统等, 形成一种永久性的毁坏,因而影响集成电路(Integrated Circuits,...
EOS/ESD EP103:1990—ESD program management: A realistic approach to continuous, measurable improvement in static control. EOS/ESD EP105:1995—ESD in silicon integrated circuits. ESD 1:2000—General practices for ESD control for MR and GMR heads. ...
E. Amerasekera, et al., ESDinsilicon ICs.2002Oh,Kwang-Hoon, “ESD”, the power franchiseWhite Paper4“Understanding-Electrical-Overstress”, ESD Association,2016A. Amerasekera et al., ESDinSi ICs,1995K. Banerjee et al., IRPS1996Wang A Z H. On-chip ESD protectionforintegrated circuits.20...
The present invention provides an ESD device for protecting thin oxide layers in transistors or capacitors in an integrated circuit. In one embodiment, the ESD device includes a sil
,ESD in Silicon Integrated Circuits,pp. 96, 283. (Wiley, 2d ed. 2002). The ballast resistance can also be implemented using a back-end ballast approach as described in K. G. Verhaege and C. C. Russ, “Wafer Cost Reduction Through Design of High Performance Fully Silicided ESD Devices...