set_global_assignment -name TOP_LEVEL_ENTITY C5G_HSMC_XCVR_LOOPBACK_TESTset_global_assignment -name ORIGINAL_QUARTUS_VERSION 16.1.0set_global_assignment -name PROJECT_CREATION_TIME_DATE "11:58:04 JULY 18, 2022"set_global_assignment -name LAST_QUARTUS_VERSION "16.1.0 Lite...
Issue Description I follow srsue tutorial (https://docs.srsran.com/en/latest/usermanuals/source/srsue/source/2_ue_getstarted.html) and install srsran and srsue, but cannot run successfully. Setup Details ubuntu 18.04; usrp B210 Install s...
[INFO] [B200] Register loopback test passed [INFO] [B200] Asking for clock rate 23.040000 MHz... [INFO] [B200] Actually got clock rate 23.040000 MHz. Waiting PHY to initialize ... done! Attaching UE... ... ...
Another common debug approach is to enable TSE internal loopback to isolate whether the issue is inside FPGA or outside on your board setup Thanks. Regards, dlim Translate 0 Kudos Copy link Reply Deshi_Intel Moderator 03-09-2021 12:11 AM 643 Views Hi, We do not receive any...
- rose: check NULL rose_loopback_neigh->loopback - net/mlx5e: Properly disable vlan strip on non-UL reps - net: moxa: get rid of asymmetry in DMA mapping/unmapping - bonding: 802.3ad: fix no transmission of LACPDUs - net: ipvtap - add __init/__exit annotations to module init/...
lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:80 errors:0 dropped:0 overruns:0 frame:0 TX packets:80 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:5760...
memsize=3072000 msm_rtb.filter=0x237 ehci-hcd.park=3 lpm_levels.sleep_disabled=1 service_locator.enable=1 swiotlb=2048 androidboot.configfs=true loop.max_part=7 androidboot.usbcontroller=a600000.dwc3 buildvariant=userdebug root=/dev/dm-0 dm="system none ro,0 1 android-verity /dev/sde48...
●Port loopback (PortLoopback) test: The serializer and deserializer (SerDes) port loopback test (also called the electrical port loopback test) can be run on demand on all the ports regardless of the port state, and it checks the data path up to the PHY component. This ...
CC drivers/net/loopback.o CC drivers/base/class.o CC drivers/input/input-mt.o .o CC drivers/net/phy/linkmode.o gnware-platdrv.o CC drivers/usb/host/xhci-ext-caps.o CC drivers/base/platform.o CC drivers/usb/dwc3/gadget.o ...
memsize=3072000 msm_rtb.filter=0x237 ehci-hcd.park=3 lpm_levels.sleep_disabled=1 service_locator.enable=1 swiotlb=2048 androidboot.configfs=true loop.max_part=7 androidboot.usbcontroller=a600000.dwc3 buildvariant=userdebug root=/dev/dm-0 dm="system none ro,0 1 android-verity /dev/sde48...