and offset correction) enabled Always write '0' 7 STBY 6 LVDS CLKOUT STRENGTH 5 LVDS DATA STRENGTH 4 0 321 0 PDN GLOBAL 0 0 0 Bit 7 Bit 6 Bit 5 Bits[4:3] Bit 2 Bits[1:0] STBY: Standby setting 0 = Normal operation 1 = Both channels are put in standby; wakeup time from this...
CPU-watchdog Module The WDINT signal enables the watchdog to be used as a wakeup from IDLE/STANDBY mode. In STANDBY mode, all peripherals are turned off on the device. The only peripheral that remains functional is the CPU-watchdog. This module will run off OSCCLK. The WDINT signal is...
Otherwise, it will not be possible to use a wakeup mechanism. The AUX_POWER signal is a logic input to the 82541xx controller that denotes auxiliary power is available. If AUX_POWER is asserted, the 82541xx device will advertise that it supports wake up from a ...