A duty-cycle corrector circuit produces a clock signal with a given duty cycle (e.g., fifty percent) or with a substantially given duty cycle. The DC corrector circuit includes a de
A duty cycle correction circuit may include an error booster suitable for amplifying an input clock duty error, a driver suitable for driving an output clock based on the input clock, and a duty corrector suitable for correcting the output clock duty based on the duty error amplified by the ...
Duty cycle corrector circuits that utilize differing unit delay elements in their delay lines in either a graduated or a stepped unit time delay arrangement are for synchronizing with a clock signal. These graduated or a stepped unit time delays allow reduction in the number of the fine unit del...
A duty cycle correction circuit includes a duty cycle corrector and a detection circuit. The duty cycle corrector generates a first input signal having a second duty cycle with a higher degree of equivalence than the first duty cycle in response to a first detection signal and a first control ...
Duty cycle correction amplification circuit 专利名称：Duty cycle correction amplification circuit 发明人：Yang Ki Kim 申请号：US11527381 申请日：20060927 公开号：US07525359B2 公开日：20090428 专利内容由知识产权出版社提供 专利附图：摘要：A duty cycle correction amplification circuit is disclosed and ...
名称:DUTY CYCLE CORRECTOR 发明人:Alessandro Minzoni,Jonghee Han 申请号:US114 034 53 申请日:200604 13 公开号:US2007024 1799A1 公开日:20071018 专利附图: 摘要:A duty cycle corrector includes a first controllable delay, a second controllable delay, a phase detector, and a compensation circuit. ...
There is provided a compact duty cycle correction circuit including minimal components for generating a signal with a 50% duty cycle. The duty cycle correction circuit includes a st
Duty cycle correction circuit has a duty cycle detector, analog- and digital- duty cycle, duty cycle corrector correction according to the present invention. The working cycles of the detection section detection digital clock correction of working cycles. The working cycles of external clock are ...
Summary This paper presents a fast-corrected all-digital duty-cycle corrector (DCC) with synchronous input clock. The proposed DCC has many features, inclu... SK Kao,SH Hsueh - 《International Journal of Circuit Theory & Applications》 被引量: 3发表: 2016年 加载更多站...
A duty cycle error correction circuit is disclosed. The circuit includes an inversion and delay circuit and a phase interpolator. The inversion and delay circuit is configured to re