12GHz Dual-Modulus Divide-by-4/5 DV45D 分频比:4/5 时钟频率:12 GHz 特征:双模量4/5 品牌:EUVIS 产品详情介绍 DV45D是一款高速双模数除以4/5的静态分配器,采用16针3x3mm塑料QFN封装。DV45D具有输入灵敏度高、输出相位噪声低、体积小等优点,非常适合于从通信、仪器仪表、无线电/雷达到医疗等领域的广泛...
Rana, R.S., "Dual-modulus 127/128 FOM enhanced prescaler design in 0.35µm CMOS technology," Solid-State Circuits, IEEE Journal of , vol.40, no.8, pp. 1662- 1670, Aug. 2005. :Rana,Ram Singh.Dual-modulus 127/128 FOM enhanced prescaler design in 0.35-μm CMOS technology.IEEE ...
A Dual-Modulus Prescaler (DMP) is an important circuit block used in frequency synthesizers to divide the high-frequency signal from the voltage controlled oscillator (VCO) to a low-frequency signal by a predetermined divide ratio, either (N+1) or N, which is controlled by a swallow counter...
2) dual-modulus phase switching prescaler 双模相位开关预分频器 1. Based on the circuit requirements,a 14/16 dual-modulus phase switching prescaler for WLAN 802. 11a/b/g标准的14/16双模相位开关预分频器。 更多例句>> 3) double modulus divider 双模分频器 1. The double modulus divider ...
1. 双模前置分频器 术语表:双模前置分频器 (Dual-Modulus-Prescaler)china.maximintegrated.com|基于1 个网页 例句 释义: 全部,双模前置分频器 更多例句筛选 1. It consists of a dual-modulus prescaler, a fixed-ratio program counter, and a programmable swallow counter. 它是由一个双模除频器,固定比率程式...
1. Based on the circuit requirements,a 14/16 dual-modulus phase switching prescaler for WLAN 802. 11a/b/g标准的14/16双模相位开关预分频器。更多例句>> 2) dual-modulus prescaler 双模预分频器 1. A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency (...
网络释义 1. 双模前置分频器 在锁相环设计中,双模前置分频器(dual-modulusprescaler)是一个速度瓶颈,而D触发器是限制其速度的主要因素。A dual-modulu… www.dictall.com|基于2个网页
DUAL-MODULUS DIVIDER 专利名称：DUAL-MODULUS DIVIDER 发明人：LI, Xiaopeng 申请号：SE2001001172 申请日：20010523 公开号：WO01/093427P1 公开日：20011206 专利内容由知识产权出版社提供 摘要：This invention relates to a CMOS prescaler device for frequency dividing a high frequency signal, said device ...
TheDual Modulus Prescalersubsystem block consists of a program counter, a swallow counter and a prescaler. When the block first receives an input signal, the pulse swallow function is activated. The prescaler divides the input signal frequency by (N+1), whereNis defined by thePrescaler divider ...
关键词: CMOS logic circuits UHF integrated circuits flip-flops frequency synthesizers prescalers 0.25 micron 1.8 GHz 5.525 mW CMOS dual-modulus prescaler double-edge-triggered D-flip-flops 被引量: 400 摘要: The present invention provides one dual-modulus prescaler using double edge triggered D-flip...