It was an revolutionary concept that was developed by microsoft for delivering the n-tier architecture. Later it was suffered from backward compatiablitiy issues and then it gave birth to the .net technology which incorporatates the safer exection of code through CLR. DNA is also suffered ...
DE10048072A1 2000年9月28日 2001年4月26日 Infineon Technologies Corp Direct memory access (DMA) descriptor architecture for access to computer storage devices has increased access speed by enabling one DMA descriptor to contain more that one data pointer...
An AMBA AHB-based Reconfigurable SoC Architecture Using Multiplicity of Dedicated Flyby DMA Blocks[C]//Proc. of the Design Automation Conference. 2005: 1256. 2 Yuan Hang, Chen Hongyi, Bai Guoqiang. An Improved DMA Controller for High Speed Data Transfer in MPU Based SoC[C]//Proc. of the ...
The kernel (on the x86 architecture, in the default configuration) splits the 4-GB vir- tual address space between user-space and the kernel; the same set of mappings is used in both contexts. A typical split dedicates 3 GB to user space, and 1 GB for ker- nel space.* The kernel...
3.3 ARM966E-S CPU core The ARM966E-S core inherently has separate instruction and data memory interfaces (Harvard architecture), allowing the CPU to simultaneously fetch an instruction, and read or write a data item through two Tightly-Coupled Memory (TCM) interfaces as shown in Figure 1. ...
PCIe DMA缓冲池的流量控制协议 黄双双，郝一太，罗伟杰 （中国航空工业集团公司西安航空计算技术研究所，陕西 随着航空电子的发展，机载计算机对通信性能提出了更高的要求。PCIe 通信方式凭借高吞吐量、低时延及低中央处理器 广泛应用于嵌入式计算机通信。在复杂网络拓扑的PCIe架构中，由于通信节点接收数据和发送数据的...
[3]ROTA L,CASELLE M,CHILINGARYAN S,et al.A PCIe DMA Architecture for Multi-Gigabyte Per Second Data Transmission[J].IEEE Trans on Nuclear Science,2016,62(3):972-976. [4]KAVIANIPOUR H,MUSCHTER S,BOHM C.High Performance FPGA-Based DMA Interface for PCIe[J].IEEE Trans on Nuclear Scienc...
专利名称：CONTROLLER DATA SHARING USING A MODULAR DMA ARCHITECTURE 发明人：PECONE, Victor, Key 申请号：US2002030622 申请日：20020926 公开号：WO03/030006P1 公开日：20030410 专利内容由知识产权出版社提供 摘要：A network storage controller (30) for transferring data between a host computer (50) and ...
In typical computer-based applications, the data that passes through computer input/output (I/O) devices must often be performed at high speeds, in large blocks, or large blocks at high speeds. Three conventional data transfer mechanisms for computer I/O include polling, interrupts (also known ...
A data transfer system according to one embodiment of the present invention will now be described referring to the accompanying drawings. FIG. 5 illustrates a data transfer system adapted for use in an information apparatus, such as a personal computer or a hard disk unit. This data transfer sy...