According to one embodiment, only two forms of an intermediate result of an operation to be performed by a digit-recurrence algorithm are maintained. A first form is maintained in a first register and a second
During the process carried out by the addition circuitry, an intermediate value is passed to the initialisation circuitry 140 as before, which determines a first digit of the output quotient and a remainder after a first iteration of the digit-recurrence algorithm. This occurs substantially in ...
The first one implements a simple restoring shift-and-subtract algorithm, whereas each of the other four implementations performs a nonrestoring digit recurrence algorithm with signed-digit redundant quotient calculation and carry-save representation of the residuals. More precisely, the quotient digit ...
Nannarelli, "Low latency digit-recurrence reciprocal and square-root reciprocal algorithm and architecture," 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005, pp. 147-154.E. Antelo, T. Lang, P. Montuschi, A. Nannarelli, Low latency digit-recurrence reciprocal and square- root ...
The first one implements a simple restoring shift-and-subtract algorithm, whereas each of the other four implementations performs a nonrestoring digit recurrence algorithm with signed-digit redundant quotient calculation and carry-save representation of the residuals. More precisely, the quotient digit ...
The first one implements the simple shift-and-subtract algorithm, whereas the second and third implementations each perform digit recurrence algorithm with signed-digit redundant quotient alculation and carry-save representation of the residuals. However, the second divider computes the quotient digit ...
According to one embodiment, only two forms of an intermediate result of an operation to be performed by a digit-recurrence algorithm are maintained. A first form is maintained in a first register and a second form is maintained in a second register. Responsive to receiving digits 1 to L−...