功能: Dual D-Type Flip-Flop 高度: 0.9 mm 长度: 5 mm 静态电流: 10 uA 系列: 74LCX74 宽度: 4.4 mm 商标: ON Semiconductor / Fairchild 通道数量: 2 输入线路数量: 4 输出线路数量: 2 工作电源电压: 2 V to 3.6 V 产品类型: Flip Flops 复位类型: Set, Reset 工厂包装数量: 2500 子类别: Lo...
Specialty D-type flip-flops Whether your design is destined for an automobile, space, or anything in between we have a qualified device to fit your needs. Common applications of D-type flip-flops Store data until it is needed D-type flip-flops allow data to be stored until it is needed...
The buffered clocks (CPn) and buffered Output Enables (OEn) are common to all flip−flops within the respective byte. The flip−flops will store the state of individual D inputs that meet the setup and hold time requirements on the LOW−to−HIGH Clock (CP) transition. With the OE...
产品类型 Flip Flops 复位类型 Set, Reset 工厂包装数量 1100 子类别 Logic ICs 零件号别名 74LCX74M_NL 单位重量 150 mg 可售卖地 全国 型号 74LCX74M 全新原装正品现货供应·代理TI NXP AD等系列产品·分销各大进口品牌芯片!13420935820 PDF资料 逻辑及时序器件-触发器-74LCX74M-FAIRCHILD/仙童-...
SCFL D-type flip-flopssteady-state sinusoidal analysisoutput voltage swing variationThis article describes a simple, analytical expression for the operating speed of SCFL D-type flip-flops in terms of steady-state sinusoidal analysis. The analysis considers the output voltage swing variation caused ...
The D-Type Flip-Flop models a generic clocked data-type Flip-Flop . The Q and QN outputs can change state only on the specified clock edge. The clock edge trigger can be set with the Trigger Condition ...
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LVC374A, SN74LVC374A SCAS296O – JANUARY 1993 – REVISED JULY 2014 SNx4LVC374A Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 1 Features •1 Operate From 1.65 V to 3.6 V • Inputs...
54ACT574 - Rad-Hard Octal D-Type Flip-Flop 3-state, RHFACT574K01V, RHFACT574K1, RHFACT574K02V, STMicroelectronics
Octal D-Type Flip-Flops with Clear MM74HC273 General Description The MM74HC273 edge triggered flip−flops utilize advanced silicon−gate CMOS technology to implement D−type flip−flops. They possess high noise immunity, low power, and speeds comparable to low power Schottky TTL circuits. ...
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