D FLIP-FLOPPURPOSE: To reduce the circuit scale of a D flip-flop by connecting an output of a transistor(TR) of an output side of a feedback circuit and a TR of a signal input side to the input side of a 3rd TR. ;CONSTITUTION: An output of a 1st TR 2 connecting to a signal ...
PURPOSE:To prevent a circuit from malfunctioning by a pull-down element which absorbs a charge due to parasitic capacity accompanying the base of each transistor(TR) between the cross-connected bases and collectors of the TRs of a master flip-flop. CONSTITUTION:A diode D17 which has large junc...
delay flip-flop 延迟触发器delay gate generator 延迟选通脉冲发生器delay generator 延迟振荡器delay line for color tv 彩色电视机用延迟线delay pick off 延迟发送器delay relay 延迟继电器delay switch 延时开关delay-action circuit breaker 延时断路器delay-action fuse 延时熔断器delay-line canceller 延迟线消除器...
Proposed in this paper is a low-power consumption D flip-flop circuit with asynchronous reset on the basis of Pseudo-CMOS logic gates, which consists of n-type a-IGZO TFTs (Thin Film Transistors), replaces the dio-deload in Pseudo-CMOS topology with dynamic load, and decreases the static ...
1) COMS D flip-flop 互补金属氧化物半导体D触发器2) CMOS 互补金属氧化物半导体 1. 25 μm 1P3M CMOS process is applied in the design. 25μm 1P3M的标准互补金属氧化物半导体(CMOS)工艺。 2. A development of infrared focal plane array (IRFPA) complementary metal oxide semiconductor (CMOS) ...
D-flip flop D型触发器 D-sorbitol solution 山梨糖醇液 D-sorbitol 山梨醇 d-tert-butyl-p-cresol 二特丁基对甲酚 D-trans allethrin 反丙烯除虫菊 d.bass 低音提琴 DA converter 数模转换器 dabber 上墨滚筒 dabins 达宾高支漂白细平布 Dacagin 达可粘 ...
PURPOSE: A dynamic D-flipflop circuit is provided to reduce the number of transistors using a Ratioed logic scheme. CONSTITUTION: A dynamic D-flipflop circuit includes an N-C2 MOS terminal(100) for receiving an input signal(D) to output the first output signal(150). A Ratioed latch termi...
Current selective D flip-flop circuit An embodiment of a current selective D flip-flop circuit comprises a D flip-flop, a current selector and a current multiplier is disclosed. The current selector is used for receiving and summing at least two currents to form a summed cur... D Ye,CP...
1. The ECL OR-AND-gate can simplify a generalized ECL circuits structures,for example,an ECL double-edge-triggered D flip-flop. 8V,作为常规ECL门的补充类型,常可用于简化一般ECL电路结构,例如ECL双边沿D触发器。2) double-edge-triggered D flip-flop 双边沿D触发器 1. Design of multi-valued ...
4. The circuit of claim 1 wherein the D flip-flop device is an ECL D flip-flop having a plurality of NPN transistors, implemented in bipolar or CMOS technology. 5. The circuit of claim 4 wherein each said latch comprises: a pair of input transistors, one said input transistor having ...