Numerical experiments have been made to achieve a reasonable trade-off between the desired accuracy and the CPU time. The algorithm was implemented to the process module of the 2-D integrated process and device modeling system IMPEDANCE 2.0....
A new fast two-dimension 8×8 discrete cosine transform (2D 8×8 DCT) algorithm based on the characteristics of the basic images of 2D DCT is presented. The new algorithm computes each DCT coefficient in turn more independently. Hence, the new algorithm is suitable for 2D DCT pruning algorit...
a high level implementation of a high performance FFT for OFDM modulator and demodulator is presented.The design has been coded in Verilog and targeted into Xilinx Spartan3 field programmable gate arrays.Radix-2~2 algorithm is proposed and used for the OFDM communication system.The design of the...
The AVH316B, AVH316C, AVH316D, AV0716C, AV0716D, AV1416D, AV2116A, AV2816A is a single-chip synthesizing CMOS VLSI that can synthesize voice up to 3.5,7,14,21,28 seconds using APLUS qualified coding algorithm (LOGPCM). Customer speech data will be edited and programmed into ...
Based on the modified Booth's algorithm, a fast 1-D serial- parallel systolic multiplier is designed for multiplying two's complement numbers. The circuit with countercurrent data flow pattern accepts the multiplicand serially, the multiplier in parallel, and outputs the product serially. It ...
This paper proposes a low complexity n-dimensional (nD) FastICA algorithm and architecture by introducing the concept of coordinate rotation where n ≥ 2. The proposed algorithm can merge the two key steps of conventional FastICA-preprocessing and update and is therefore capable of reducing the ha...
In reality, the Vth distribution is broadened due to ISPP noise, which is the ultimate accuracy of the ISPP algorithm [23]. Figure 11(a) shows the Vth distribution evolution (sweep every two loops, without considering RTN effect) during the ISPP PV function. The PV level is 2.5 V, and ...
(2015). ERDIA: An efficient and robust data integrity algorithm for mobile and wireless networks. In IEEE Proceedings of the wireless communications network conference (WCNC) (pp. 2103–2108). IEEE. Badawy, A., et al. (2016). Unleashing the secure potential of the wireless physical layer: ...
A Distributed Parallel Random Walk Algorithm for Large-Scale Capacitance Extraction and Simulation In this paper, we present the techniques in RWCap2, which is a fast capacitance field solver for VLSI interconnects. The solver is based on the floating random walk (FRW) algorithm for capacitance ex...
algorithm usesthelinear prediction mechanismbasedonhistoricaldatato adjust the range andorientationof voltage and 抒equenc%Theparametersare obtained throughregression method.Experimental resultsshowthatthe optimized DVFS strategy couldsave 13.55%energycompared ...