Short-length Effects on Electromigration Lifetime of Cu Interconnects In 90nm Low-k CVD ILD TechnologyThe electromigration (EM) lifetime of Cu interconnects was studied as a function of length for different directions of electron flow. The length dependence behavior was observed to be strongly ...
However,theHDP-CVDprocesscontainssomepotentialprob- lemsincludingplasma-induceddamage[1].Inthisresearch,we triedtoreduceplasma-induceddamagetothegateoxideduring theinterlayerdielectric(ILD)gap-fillprocessaftertheformation ofthebitlinebyHDP-CVD.Thedegradationofthegateoxideby plasma-induceddamageaggravatedyieldand...
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Compared to the APCVD O_3/TEOS process, the HDP CVD has advantages of avoiding the surplus steps for removing the surface dependency and suppressing void formation. Additionally, the process temperature for HDP CVD films for ILD is lower than 600 deg C.Jin-Won Kim...
Jun-woo Lee , Hwan-woo Kim , Hyung-joon Kim , Seog-gyu Kim , Kyu-pil Lee , Soo-cheol Lee , Dong-gun Park , Byoung-deog Choi, Reduction of plasma-induced damage during HDP-CVD oxide deposition in the inter layer dielectric (ILD) process, Microelectronic Engineering, v.88 n.8, p...
Major damage was induced in the HDP-CVD process for filling a gap after the formation of the bit line. We observed the gate oxide degradation of the thick gate oxide PMOSFET without protection diodes in IG鈥揤G curves. We also discovered that the breakdown voltage of the PMOSFET without ...