A line 99 enables selection of unipolar or bipolar operation by means of a power switch 96 and NAND gates 27a. 28a and 29a. In an extra measure of efficiency, the apparatus includes a commutation delay timing circuit 95 for ... DH Peters,J Harth 被引量: 0发表: 1991年 Unipolar and bip...
A time multiplexing circuit applied to a DC-DC converting system including first to third NOR gates, first and second inverters, first and second D-type flip-flops, a NAND gate, an OR gate and an AND gate. The first NOR gate and second NOR gate receive the first and second pulse-width...
products such as Personal Digital Assistant (PDA), Digital Camera, Cell Phone and so on. According to small memory cards described above, AND type and NAND type flash memory are the memory components frequently used to write, rewrite and keep the data during long period of time without power...
;SOLUTION: A synchronizing element 200 consists of four flip flops 211 to 214, two AND gates 221 and 222, one NAND gate 223, and one inverter 224. The first flip flop 211 acquires the leading edge of the input signal, and second and third flip flops 212 and 213 generate the pulse ...
Circuit 20, which produces the address selection signal EMJ, includes a NAND gate 51 which generates signal EMJ and which has one input connected to the output of a NAND-gate 52 and another input connected to the output of a NAND-gate 53. NAND-gate 53 has one input connected to the out...
CIRCUIT CONVERTS UNIPOLAR DIGITAL DATA TO ALTERNATE-MARK INVERSE FORMAT A circuit is presented which converts unipolar TTL binary data into bipolar alternate-mark signals. The circuit, which consists of three NAND gates and a s... MVS Rao,S Singh 被引量: 0发表: 1974年 Bipolar unipolar conve...
When a 0 bit is stored in the first flip-flop simultaneously with a 1 bit being stored in the second flip-flop, no output pulses is produced by the second NAND gate. The output pulses produced by the two NAND gates are converted to an output signal, representing a double density encoded...
When a 0 bit is stored in the first flip-flop simultaneously with a 1 bit being stored in the second flip-flop, no output pulses is produced by the second NAND gate. The output pulses produced by the two NAND gates are converted to an output signal, representing a double density encoded...
PURPOSE:To facilitate the conversion of clock frequecy with a simple circuit, by using two NAND gates, a specific frequency and a clock signal of an integer-fold level of frequency compared with said specific frequency. CONSTITUTION:A clock signal of frequency f is supplied to an input ...
(storing means) constituted of NAND gates NA03 and NA04, and which of the control signal group of the Intel-type CPU or the control signal group of the Motorola-type CPU has been inputted is recognized on the basis of the contents of the latch, and when the control signal group of ...