It compares the voltage at a pair of inputs, and a status bit is set if the C+ pin is higher than C−. The comparator status bit may also be monitored at an output pin. The ‘917 has two such comparator modules; they are enabled using a system function to set the operating mode...
A comparator for aggregate function f is an automaton that accepts a pair (A, B) of sequences of bounded rational numbers iff f (A) R f (B), where R is an inequality relation (>, <, ≥, ≤) or the equality relation. A comparator could be finite-state or (pushdown) infinite-...
The use of the HIGH and LOW terms is somewhat arbitrary, however, since in some situations they may be reversed with no effect on the operation of the comparators of the present invention. Transistors function as switches as is well known in the art, and in this application, the terms "tr...
This relation works in both directions by allow the value to also act as a key to key, e.g. a pair (a,b) thus provides a coupling between 'a' and 'b' so that 'b' can be found when 'a' is used as a key and 'a' can be found when 'b' is used as a key. type BidiMap...
in and Vref being comparison objects at respective gates and which act as a differential transistor pair; and N channel field effect transistors 15 and 16 which function as the current paths of the respective drain currents of the two P channel field effect transistors and act as a current ...
Typical timing associated with the latch-enable function is shown in Figure 2-63. The delay between the assertion of latch-enable and the 50% point of the output logic swing is referred to as latch-enable to output delay. It may be different for positive- and negative-going outputs. The ...
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This relation works in both directions by allow the value to also act as a key to key, e.g. a pair (a,b) thus provides a coupling between 'a' and 'b' so that 'b' can be found when 'a' is used as a key and 'a' can be found when 'b' is used as a key. type BidiMap...
The criterion for the input limit is that the output still responds correctly to a small differential input signal. The differential input stage is a pair of PNP transistors, therefore, the input bias current flows out of the Pin Descriptions PIN NUMBER PIN NAME FUNCTION EQUIVALENT CIRCUIT 1 VS...
in which the controller causes a PMOS transistor pair of the comparator topology to operate in conjunction with the NMOS transistor pair to more quickly drive the output voltages to the supply and ground voltages, respectively, to provide a comparator output that is useful for a digital circuit....