Clock Divider 100MHz to 26MHz sunil401 Sep 22, 2008 VHDL Replies 1 Views 93 Sep 27, 2008 jeandelfrigo Locked Question port map and clock ghitaion Apr 8, 2008 VHDL Replies 0 Views 57 Apr 8, 2008 ghitaion Locked Question Basic Clock division help vb001 Mar 23, 2008 VH...
I want to generate 1Hz clock with 50% duty from 40MHZ input clock to MAX II CPLD. I had known to keep the 40MHz clock as input then use the