However, the reset of the IDELAYCTRL is assigned to io_resset, I believe it is not correct, this reset should be tied to clk_reset. (* IODELAY_GROUP = "ADC_SELECTIO_INTERFACE_selectio_wiz_0_0_group" *) IDELAYCTRL delayctrl ( .RDY (delay_locked), .REFCLK (ref_clock_bufg), .RST ...
<set_property CLOCK_DEDICATED_ROUTE ANY_CMT_COLUMN[get_nets level0_i/blp/blp_i/blp_hif/inst/clkwiz_level0_periph/inst/clk_out2]> level0_i/blp/blp_i/blp_hif/inst/clkwiz_level0_periph/inst/clkout2_buf(BUFGCE.O)islocked to BUFGCE_X0Y32(inSLR0) Theloads are ...