这是一个简单的32位计数器 •输入:•clk:时钟信号。•reset:重置信号。当reset为高电平时,计数器重置为0。•enable:使能信号。当enable为高电平时,计数器在每个时钟周期递增。•输出:•count:32位计数器,保存当前的计数值。•功能:•在每个时钟上升沿,如果enable为高且没有重置,则计数器递增。•...
unsigned int enable_count; unsigned int prepare_count; unsigned int protect_count; unsigned long min_rate; unsigned long max_rate; unsigned long accuracy; int phase; struct clk_duty duty; struct hlist_head children; struct hlist_node child_node; struct hlist_head clks; unsigned int notifier_c...
return0; if(WARN_ON(clk->prepare_count==0)) return-ESHUTDOWN; if(clk->enable_count==0) { ret=__clk_enable(clk->parent); if(ret) returnret; //这里的操作见一、5中的函数,内部进行了函数集绑定 if(clk->ops->enable) { ret=clk->ops->enable(clk->hw); if(ret) { __clk_disable(...
那么如果parent关闭了,当前clk也就没有了。 secondary - 第二时钟源,用于enable/disable当前clk。 usecount - 引用计数。 get_rate, set_rate, enable, disable, set_parent - 很显然,这些函数指针指到实际操作的函数。clk.h中的各接口函数最后都会调用到这里的函数指针。函数指针是隔离变化的最好办法,在这里一...
unsigned int enable_count; unsigned int prepare_count; unsigned long min_rate; unsigned long max_rate; unsigned long accuracy; int phase; struct hlist_head children; struct hlist_node child_node; struct hlist_head clks; unsigned int notifier_count; ...
unsigned int enable_count; /* clk_core_enable 每次enable +1 */ unsigned int prepare_count; /* clk_core_prepare 每次prepare +1 */ unsigned int protect_count; /* */ unsigned long min_rate; /* */ unsigned long max_rate; /* */ ...
debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);ret...
rate, prescaler[k -1]);/* clear TCNT on TGRB match, count on rising edge, set prescaler */r_tpu_write(p, TCR,0x0040| (k -1));/* output 0 until TGRA, output 1 until TGRB */r_tpu_write(p, TIOR,0x0002); rate /= prescaler[k -1] * p->refresh_rate; ...
> + WARN_ON(clk->prepare_count); > + WARN_ON(clk->enable_count); These two WARN_ON()s are triggered a lot when using a legacy clock domain, and CONFIG_PM=n. Indeed, without Runtime PM, the idea is that the module clocks ...
[ 2.846580] clk: enable count for gcc_aggre1_ufs_axi_clk is 1 [ 2.848956] clk: prepare count for gcc_aggre1_ufs_axi_hw_ctl_clk is 0 [ 2.849050] clk: not unpreparing unused gcc_aggre1_ufs_axi_hw_ctl_clk [ 2.849096] clk: finishing prepare handoff gcc_aggre1_ufs_axi_clk [ 2.8491...