There is provided a flip-flop circuit comprising: evaluation means the evaluation component is connected to the first node and the second node to the first node according to the voltage level of the second node discharge; condition delay element, the delay means connected condition to the second...
Disclosed is a flip-flop provided with a first CMOS circuit in which the gate terminals and drain terminals of a P channel first transistor and an N channel second transistor are connected, a second CMOS circuit in which the gate terminals and drain terminals of a P channel third transistor ...
A bi-stable circuit comprises three NOR gates 10, 12, 14 (Fig. 1) the outputs of the first two being coupled via an OR gate 16 to the input of the third and the output of the third being fed into the second. Reset pulses of the same polarity as the significant output of the NOR...
S-R flip-flop circuit 专利名称：S-R flip-flop circuit 发明人：Michael Thomas Kilpatrick 申请号：US09266892 申请日：19990312 公开号：US06218879B1 公开日：20010417 专利内容由知识产权出版社提供 专利附图：摘要：An S-R flip-flop circuit is provided using two stacks of gates with an internal ...
FLIP-FLOP CIRCUIT 专利名称：FLIP-FLOP CIRCUIT 申请号：JP4505181 申请日：19810327 公开号：JPS6365171B2 公开日：19881214 专利内容由知识产权出版社提供 摘要：PURPOSE:To reduce the occupation area of an FF by decreasing the number of elements even under complicate input conditions, by composing the FF ...
Disclosed is a flip-flop, provided with a plurality of latch circuits with differing resistance to soft errors, and a clock distribution unit which feeds a clock to the plurality of latch circuits, wherein the plurality of latch circuits are at least two latch circuits comprising a first latch...
A flip-flop circuit (FF ) of the present invention includes master latch circuits (LAT and LAT ), slave latch circuits (LAT and LAT ), C-element circuits (CE , CE , CE , and CE ), and inverter circuits (INV , INV , INV , and INV ). The inverter circuits (INV and INV ) are...
PURPOSE: To improve the design performance and to attain the operation of the circuit at room temperature by simplifying the structure of components in the flip-flop circuit utilizing the resonance tunnel effect. ;CONSTITUTION: An emitter terminal of a bipolar transistor(TR) Q<Sub>1</Sub> whose...
FLIP-FLOP CIRCUIT 专利名称：FLIP-FLOP CIRCUIT 发明人：MATSUURA HIDEKI 申请号：JP27744484 申请日：19841228 公开号：JPS61157113A 公开日：19860716 专利内容由知识产权出版社提供 摘要：PURPOSE:To set an output to a desired state with simple constitution at application of power by providing an N-channel ...
FLIP-FLOP CIRCUIT 专利名称：FLIP-FLOP CIRCUIT 发明人：ISHIKAWA SATORU 申请号：JP13301289 申请日：19890526 公开号：JPH02311010A 公开日：19901226 专利内容由知识产权出版社提供 摘要：PURPOSE:To observe an input signal to a FF optionally by connecting an input signal of the FF to an input terminal ...