addition without carry (无进位加法) 按位加 decay (电荷存储管的) 电荷减少 contiguous disk file (存储器) 邻接磁盘文件 美联储 Federal Reserve System of the United States the US Federal Reserve System private area (室内外为每户保留的面积) 私用面积 explosion hatches (储罐的) 活动保险盖 ...
1) Carry-save addition 进位加法 例句>> 2) addition without carry 无进位加法 例句>> 3) ripple adder 函位进位加法器 4) Carry look-ahead adder 超前进位加法器 1. Design of 16-bit carry look-ahead adder; 16位超前进位加法器的设计 2. ...
Acronyms carry-save adder [¦kar·ē ¦sāv ′ad·ər] (computer science) A device for the rapid addition of three operands; consists of a sequence of full adders, in which one of the operands is entered in the carry inputs, and the carry outputs, instead of feeding the carry inp...
doi:10.1049/ir:19950604CONTROLLERSMANIPULATORSROBOTSPresents information on a design which implements the multiple-operand addition with pipelining. Features of the design; Introduction of the carry-save-addition (CSA) technique; Advantages of the CSA technique.JonesChrisEDN...
摘要: Presents information on a design which implements the multiple-operand addition with pipelining. Features of the design; Introduction of the carry-save-addition (CSA) technique; Advantages of the CSA technique.关键词:CONTROLLERS MANIPULATORS ROBOTS ...
The first carry-save adder is capable of carrying out either the addition or the subtraction of the divisor. The second carry-save adder is adapted to carry out the subtraction of a divisor, and the half carry-save adder the addition thereof. The first and second carry-save adders generate...
The carry save adder (CSA) reduces the addition of three numbers to the addition of two numbers. The total propagation delay is the sum of the propagation delays from three gates, regardless of the number of bits. The carry save unit consists of n full adders, each of which computes a ...
High and low order bit carry propagation adders are connected to outputs of carry save adder trees which produce half-sums and half-carries. Following carry propagation addition of the low order bits carry propagation addition of the high order bits is carried out. A carry from the low order ...
to zero is formed from the rotational angle Zoand from the 0thangular step. This is likewise true of the further stages i=1 to i=n, whereby, indicated by oblique strokes, an i-fold shift occurs and the angular steps become smaller. The vector coordinates Xnand Yn, in addition to a re...
Most Field Programmable Gate Array (FPGA) devices have a special fast carry propagation logic intended to optimize addition operations. The redundant adder... M Ortiz,F Quiles,J Hormigo,... - IEEE International Conference on Application-specific Systems 被引量: 31发表: 2009年 High Speed Speculati...