Behavioural modelingMASTSaber-VerilogHSPICEMixed-signal ASICSimulationDuring the last 10 years, the use of computer simulation at IC level has become prevalent in the design process. As the size of designs has
A behavioural modelthat combines theperformance andvariation fora given circuit topology is developed which canbeusedtooptimise thesystem level structure. Theapproach enables top-down system optimisation, notonlyfor performance butalso foryield. Themodelhasbeendeveloped in Verilog-A andtested extensively ...