Hi all, new user here, and new to verilog as well. I have some questions about indexing an array. Say I have a 16x8bit array. There will be an address input that points to which one of the 16 bytes to do action on. The trigger tells it when to do the action. Here's the in...
To access it, you can either use a hard-coded slice, likePARAM_ARRAY[7:0], or use+:. Please note thatPARAM_ARRAY[8*index +: 8]is required for this, and it needs Verilog-2001 or a higher version, which is supported by most open-source simulators. Additionally, Indexing vectors and ...
VHDL code:type std_logic_8_12bit is array (7 downto 0) of std_logic_vector(11 downto 0);signal afe_value: std_logic_64_12bit := (others => x"000");Verilogreg [11:0] afe_value [0:7]; --- I think this is correct but I do not know how to give it initial value...Syn...
While an array of interfaces looks like you should be able to do dynamic dereferencing, you cannot - the LRM (for whatever reason) states that the indexing must be a constant. (Some early SystemVerilog simulators actually ignored the LRM and allowed dynamic dereferencing...
-- indexing an array 41 ifMemoryReadthen 42 Data<=Memory(TO_INTEGER(Address)); 43 elsifMemoryWritethen 44 Memory(To_INTEGER(Address)) :=Data; 45 endif; 46 47 --- 48 endprocess; 49 50 endarchitectureA1; 51 8445