Table 1. Applicable methods to handle soft errors supported by STM32 HW features HW feature or SW method Addressed goals Methods IEC 60355 - Class B references ARM Cortex® core exceptions / periodical core s
(HSI) ● Independent watchdog ● Timers (TIM2, TIM3 and TIM4) ● IR (infrared interface) 1.3 Blocks that are compatible with minor exceptions Some of the peripherals or functional blocks can have differences in their electrical parameters, structure, registers, control...
• ASRC—Asynchronous Sample Rate Converter Security functions are enabled and accelerated by the following hardware: • ARM TrustZone including the TZ architecture (separation of interrupts, memory mapping, etc.) • SJC—System JTAG Controller. Protecting JTAG from debug port attacks by ...
A new feature is available for bare-metal applications through a Platform CDD which allows configuring and handling the interrupts for the application. The usage of this CDD is optional and interrupt management can be customised for the application. Previous functionalities that were available only in...
or processor hang. STL tests do not produce exceptions (unless triggered by a fault) or interrupts, load or store outside of the stack or customer-allocated memory buffers, and do not alter the processor state. This allows for STL tests to be run periodically from the application without aff...
public void Start() { // Enable interrupts on BT input on the HC-06 radio hc06.DataReceived += hc06_DataReceived; // Use onboard button to turn on/off accepting commands button = new InterruptPort(Pins.ONBOARD_SW1, false, Port.ResistorMode.Disabled, Port.Int...
2 Errata and fix information of the various mask sets can be found in the standard MCIMX31 Chip Errata, see Section 7, "Product Documentation." 3 Changes in output buffer characteristics can be found in the I/O Setting Exceptions and Special Pad Descriptions table in the Reference Manual, ...
class low noise performance with leading bias instability to guarantee accurate vehicle location, on-chip 16-bit ADCs, and industry-leading sensitivity tolerance. Compared to previous generation 3-axis gyroscopes, it offers extended FIFO depth up to 4096-byte and two independent programmable interrupts...
Interrupt handling, including dynamic IRQ assignment, IRQ sharing, and nested interrupts. CPU exception handling, also nested and re-entrant. Automatic translation of CPU exceptions to C++ language exceptions. Cooperative multi-threading, implementingstd::thread. ...
other system events such as interrupts or exceptions, etc. It should be understood that the security applications112may be configured according to any security application principles and the associated policy data sets114may be configured for compatibility with the security applications112as would be und...