The employment of the first and second proposed designs results in 42.4 per cent and 32.2 per cent PDP reduction compared to when no approximate FA are used in an 8-bit ripple adder. Originality/value Two new current-mode inexact FA are presented. They use diodes as voltage regulators to ...
Ripple carry adder is assumed for modeling the number of full adders. 3.2.1. Variable Multiplied with Another Variable An example of this kind of multiplication is variable V1[16:0] multiplied with another variable V2[17:0] resulting in product P1[34:0]. Since the multiplication operator ...
(i.e., a ripple carry adder) can also be applied to subrate implementations of Tomlinson-Harashima precoders where for instance a pipelined, half-rate Tomlinson-Harashima precoder implementation (but without the application of a CSA-MAC and the simultaneous modulo speculation outside the loop) ...
1/16 CompressorTrees Acircuitthatsumsk>2integervalues Carry-saverepresentation [Wallace1966,Dadda1967]ParallelmultipliersManyvideo/signalprocessingcircuits FIRFiltersH.264/AVCvideocoding3Gwirelessbasestationchannelcards Flowgraphtransformationstoexposecompressortrees [Vermaan...
The specific temperature auto-zero circuit 47 that is illustrated in FIG. 4 includes a simple oscillator 135 connected to one input of an inverting AND gate 136. The output of gate 136 is connected to the clock input of a twelve stage ripple-carry binary counter 137. The second input to ...
The proposed gate is used to design ripple carry adder, BCD adder and the carry look-ahead adder. The most significant aspect of the proposed gate is that it can work singly as a reversible full adder i.e reversible full adder can now be implemented with a single gate only. It is ...
The simulation results show that suggested energy efficient design technique provides 45% power and delay minimization over the existing design techniques. KeywordsVoltage scaling, Energy delay product, Ripple carry adder, Low power design, full adder, VLSIP. UpadhyayV. Magraiya...
Ripple carry adderPower dissipationNew dynamically Controllable DC voltage Level Converter (DCLC) technique has been developed for use in high-speed, low-power circuits. The level converter can increase the DC voltage which is supplied to a active-load circuit on request, or supply a minimal DC ...
Ripple carry adderSquare-root divider circuitWe have developed simple and closed expressions for both a short-circuit power dissipation (p{sub}s) and a charge-discharge power dissipation (p{sub}D) of a single CMOS logic gate. p{sub}s is expressed by the number (m) of logic gates ...
The proposed gate is then used to design reversible ripple carry and carry skip adders. It is demonstrated that the adder architectures designed using the proposed gate are much better and optimized, compared to their existing counterparts in literature; in terms of number of reversible gates and ...