analog to digital 模拟变数字的 Encoder 编码器一个装置能够将资料从一种表示方法编码成另外一种表示方法,例如将明码编成暗码。一个装置具有几条输入线,同时也有几条输出线,同一时间只能有一条输入线可输入信号而任何一条输出线均可输出信号,因此 encoder n.编码器 译码器 analog n.(BrE.analogue) 模拟,相...
A reduction in idle channel noise and crosstalk in a mid-riser- biased successive approximation encoder is achieved through the use of two polarity decisions. Encoder (401) assigns a sampled analog input signal to the closest one of a multitude of discrete signal levels or code steps. A ...
An encoder employing level elimination companding for higher level input signals wherein a progressively increasing number of quantum levels are eliminated between selected levels with the number of levels eliminated increasing by one for each level selected during the companding phase....
The invention relates to an encoder analog -, 1984, which gives an analog electrical signal, a binary code. < / p & gt; & lt; p & gt; an encoder comprises a first stage of comparators 1 a, 15, which weigh the analog signal input, and at least two floors of or gates - not 101...
analog to digital converter check program 模拟数字变换器检验程序 counting type analog to digital converter 计算式模拟-数字变换器 analog to digital sensing 模拟数字传感 analog to digital conversion 模拟数字转换,模数转换 analog to digital encoder 模数编码器 performance of analog to digital converto...
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performance of analog to digital convertor 模数转换器性能 analog to digital converter 模拟数字变换器,模拟数字转换程序,模拟数字转换器,模数变换器,模数转换器 analog to digital sensing 模拟数字传感 analog to digital conversion 模拟数字转换,模数转换 analog to digital encoder 模数编码器 analog to di...
of the first and second lower bit encoders to respective resistors in the associated group of the resistors, and a circuit for alernately combining the m upper bits with the n lower bits generated by the first and second lower bit encoders and for generating the digital output voltage ...
analog to digital conversion pulse 模拟数字转换脉冲 analog to digital conversion accuracy 模拟数字转换准确度 analog to digital converter 模拟数字变换器,模拟数字转换程序,模拟数字转换器,模数变换器,模数转换器 analog to digital sensing 模拟数字传感 analog to digital encoder 模数编码器 performance of...
A continuous-time ΔΣ-ADC (1) is disclosed. It comprises a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) a