The active inductor can be tuned around 10 GHz while consuming 7.57 mW from 0.9 V power supply. The CTLE compensates about 7 dB of attenuation due to the channel at a data rate of 20 Gb/s per link, with a power efficiency of 12.6 fJ/bit/dB, nearly 4X better power efficiency than ...
A 20 Gb/s Wireline Receiver with Adaptive CTLE and Half-Rate DFE in 0.13 µm Technology Yinhang Zhang, Qingsheng Hu(&), and Yongzheng Zhan Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China 736671385@qq.com, qshu@seu.edu.cn Abstract. This paper presents a 20 Gb/...
56 Gb/s PAM4 receiver with an overshoot compensation scheme in 28 nm CMOS technology 2021, Microelectronics Journal Citation Excerpt : Fig. 1(a) shows the overall architecture of the proposed receiver. The analog front end contains a continuous time linear equalizer (CTLE) [18–20], a 2-tap...
The CTLE's high-frequency boost is augmented by integrating an active inductor. A high-accuracy clock and data recovery (CDR) circuit, featuring a cascaded two-step analog phase interpolator (PI) structure, is developed for data retiming. Occupying a footprint of 0.26mm脳0.63mm per lane, the...