摘要: This work addresses some of the known problems inherent in time-interleaved, or parallel, ADCs with a new architecture. A prototype of this architecture demonstrates, for the first time, 10-bit operation at 100 MS/s in a 1 μm CMOS technology...
因此,本研究拟通过设计两种10bit,速度分别为50MS/s和100MS/s的ADC,为HDTV系统提供一个可集成的高速、低功耗ADC。 首先,本研究采用1.8V,0.18μm CMOS工艺,完成... 黄飞鹏 - 复旦大学 被引量: 5发表: 2007年 14位50MS/s100mW0.18μmCMOS流水线ADC 实现了一种14位40 MS/s CMOS流水线A/D转换器(ADC)...
45mW 10bit D/A . Spectrum analyzer 100MHz 10MHz SFDR 65dB , INL DNL 0.5 LSB . Power Guard ring 1350um×750um . In this paper, a highly linear and low glitch CMOS current mode digital-to-analog converter (DAC) by self calibration bias circuit is proposed. The architecture of the ...
A 10-bit 100 Msample-per-second analog-to-digital converter in 1-micrometer CMOS Kim, Kwang Young. University of California, Los Angeles ProQuest Dissertations Publishing, 1996. 9632886.
The AD7520 is a 10-bit multiplying digital-to-analog converter constructed on a single silicon chip. It consists of 10 CMOS (complementary metal-oxide-semiconductor) switches and a thin-film-on-CMOS R-2R ladder network. Read full article...
A CMOS triple 100-Mbit/s video D/A converter with shift register and color map A 100-Mb/s CMOS video digital-to-analog converter (VDAC) chip is described. The VDAC provides all output functions for a four-plane color video subsystem. ... Chi, K.K.,Geisenhainer, C.S.,M Riley,.....
A 12-bit, 100-MHz CMOS current-steering D/A converter for CNC (computer number control) systems is presented. To reduce the glitch and increase the SFDR (s... J Lei,H Gui,B Hu - 《Journal of Semiconductors》 被引量: 0发表: 2013年 A 10-bit 80 MHz 3.0 V CMOS D/A converter for...
Systematic design of a 14-bit 150-MS/s CMOS current-steering dia converter G.Van der Plas,,J.Vandenbussche, et al."Systematic Design of a 14-bit 150-MS/s CMOS Current-Steering D/A Converter". DAC 2000 .G. Van der Plas, et al., "Systematic design of a 14-bit 150-MS/s CMOS ...
并基于SMIC 65nm CMOS工艺,对两种典型的低功耗转换方法进行了电路设计和仿真验证。论文还讨论了高速SAR A/D转换器设计中的难点以及需要考虑的问题。最后,论文提出了一种用于SAR A/D转换器的R-C组合式D/A转换结构,和传统结构进行了比较和讨论,并基于SMIC 90nm CMOS工艺进行了电路设计和流片验证。所测得的DNL和...
A 10-bit 60-MS/s Low-Power CMOS Pipelined Analog-to-Digital Converter A 10-bit 60-MS/s low-power CMOS pipelined analog-to-digital converter (ADC) is proposed. At the front-end, a timing-skew-insensitive double-sampled Miller-... CC Lu,TS Lee - 《IEEE Transactions on Circuits & Syst...