.scndry_aclk (user_clk_i), .scndry_out (gt_reset_i_tmp2) ); assign reset_i = system_reset_i | gt_reset_i_tmp2; This is a known issue with Aurora 64B66B v9.2 Rev1 or earlier and is fixed with the v9.3 release in Vivado Design Suite 2014.3. Revision History: 11/04/2014 ...
Solution 请在aurora_64b66b_0_multi_wrapper.v 文件中让以下代码 更新: 从以下内容改变: assign gtwiz_userclk_rx_reset_in = ~(&rxpmaresetdone_int) || ~(gtwiz_reset_rx_cdr_stable_out); 改变为以下内容: assign gtwiz_userclk_rx_reset_in = ~(&rxpmaresetdone_int) ; ...
create_clock -name TS_user_clk_i_all -period 6.400 [get_pins -hier -filter {NAME =~ *aurora_64b66b_block_i/clock_module_i/user_clk_net_i/O}] create_clock -name TS_sync_clk_i_all -period 3.200 [get_pins -hier -filter {NAME =~ *aurora_64b66b_block_i/clock_module_i/s...
.scndry_aclk (user_clk_i), .scndry_out (gt_reset_i_tmp2) ); assign reset_i = system_reset_i | gt_reset_i_tmp2; This is a known issue with Aurora 64B66B v9.2 Rev1 or earlier and is fixed with the v9.3 release in Vivado Design Suite 2014.3. Revision History: 11/04/2014 ...