I need to perform convolution between 2 matrices in verilog : a 7x7 matrix that holds complex double values and a 72x300 matrix that stores double values. How should I store such a matrix in rom? Also creating 72x300 matrix involves storing large number of coefficie...
Using the top-down design method of FPGA, in the Quartus II8.1 of Altera development environment, the Verilog hardware description language (Verilog HDL) has been accomplished to training sequence, scrambler, multi-rate convolution code, interweave, 16QAM mapping, pilot insertion, IFFT modulation, ...
I need to perform convolution between 2 matrices in verilog : a 7x7 matrix that holds complex double values and a 72x300 matrix that stores double values. How should I store such a matrix in rom? Also creating 72x300 matrix involves storing large number of coefficien...