什么意思_英语data... ... speed data transfer 高速数据传送high-speed data transfer[计]高速数据传送; [计] 高速数据传输 ... dict.youdao.com|基于 1 个网页 3. 高速数据传输 什么意思_英语data... ... speed data transfer 高速数据传送high-speed data transfer[计] 高速数据传送 ; [计]高速数据传...
High speed data busdoi:US7187574 B2
A circuit for testing a high speed data bus comprises a test port, a data bus port, a signal generator, a polarity monitor, and an attenuation monitor. The test port is coupled to a test controller. The data bus port is coupled to the data bus. The signal generator may generate a ...
The cornerstone of present day military avionics architectures is the MIL-STD-1553B data bus, and it is expected to continue to serve for many years. As do other aircraft, the AH-64D Apache Longbow attack helicopter uses multiple MIL-STD-1553B buses for subsystem command and control, data com...
High-density and high-pin count flexible SMD connector for high-speed data bus A high-density high-pin-count flexible surface mount device (SMD) connector used for high-speed data buses between multichip modules (MCMs) or daughter boa... S Sasaki,T Kishimoto,EE Engineer - Electronic ...
United States Patent US6587363 Note: If you have problems viewing the PDF, please make sure you have the latest version ofAdobe Acrobat. Back to full text
High speed data bus driver 申请(专利)号: AU19980055305 申请日: 1997-12-18 专利号: AU5530598A 公开公告日: 1999-07-05 主分类号: G06F13/42 分类号: G06F13/42 申请权利人: THOMSON CONSUMER ELECTRONICS, INC 发明设计人: JURI TULTS; WILLIAM JOHN TESTIN 公开国代码: AU 申请国代码: AU 优先...
The invention comprises data processing systems and components thereof. Such systems may include a memory controller, a plurality of memory devices, a data bus coupling the memory controller with the
A very high speed data bus system for communication among the various functional units that may constitute a large computer system. The bus communication medium comprises a number of line pairs on the backplane, and the bus system comprises a bus control unit for arbitrating requests from a plura...
A high speed synchronous digital bidirectional data bus system (10) is provided and includes an M-bit unterminated data bus (14), an unterminated standing sine wave clock bus (12) and a plurality of integrated circuit bus interfaces (16a... R Welles 被引量: 0发表: 1998年 Very high speed...