arm64-sysreg-libis a header-only C library for reading/writing 64-bit Arm registers, automatically generated by parsing the AArch64 System Register XML. Key features: Bit structs defined for 263 system registers Safe values defined for all writeable registers, with all currently/previouslyRES1bit...
36 changes: 18 additions & 18 deletions36arch/arm64/kvm/sys_regs.c
Elixir Cross Referencer - source file of Linux (version v6.11.1). Browsed file: /arch/arm64/include/asm/sysreg.h
> arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts > b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts > index d58bce2a86e2..50822162bf9a 10...
Convert ID_AA64SMFR0_EL1 to automatic register generation as per DDI0487H.a, no functional change. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220704170302.2609529-28-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>master...
#define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */ 75 changes: 75 additions & 0 deletions 75 arch/arm64/tools/sysreg Original file line numberDiff line numberDiff line change @@ -1866,6 +1866,81 @@ Field 1 ZA Field 0 SM EndSysreg Sy...
*vcpu_get_reg and vcpu_set_regshould always be passed a register number *coming from aread of ESR_EL2. Otherwise, it may give the wrong result on *AArch32with banked registers. */ staticinlineunsigned long*vcpu_reg(conststructkvm_vcpu*vcpu,u8reg_num) ...
Convert ID_AA64ZFR0_EL1 to automatic register generation as per DDI0487H.a, no functional changes. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220704170302.2609529-29-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>master...
ARM64_HAS_IRQ_PRIO_MASKING) : @@ -55,7 +55,7 @@ static inline void arch_local_irq_disable(void) { asm volatile(ALTERNATIVE( "msr daifset, #2 // arch_local_irq_disable", "msr_s " __stringify(SYS_ICC_PMR_EL1) ", %0", __msr_s(SYS_ICC_PMR_EL1, "%0"), ARM64_HAS_IR...
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